Silicon on insulator (SOI) technology offers many advantages over conventional bulk silicon technology. Among these is the ability to build high performance, high speed, low power complementary-metal-oxide-semiconductor (CMOS) devices.
Turning to the prior art, one well known method to produce a silicon on insulator substrate is by bonding together two silicon wafers, each having an oxide layer, in a high temperature furnace step. Usually one side of the fused wafer needs to be thinned by chemical-mechanical-polishing. Another well known method is SIMOX (Separation by Implanted Oxygen) technology. In this technique a high dose oxygen ion implantation step is performed to place oxygen atoms in the silicon wafer at a fixed distance from the surface. This is followed by an anneal step, which then forms the buried oxide layer. Both these processes produce whole wafer silicon on insulator wafers.
Other techniques for fabricating silicon on insulator substrates use etch and oxidation steps to produce isolated silicon islands in a silicon substrate. For example, U.S. Pat. No. 5,185,286 to Eguchi, describes a process for producing a laminated semiconductor comprising the steps of forming openings in an oxide film on a silicon wafer, forming a silicon nitride island midway between the openings, growing epitaxial silicon, polishing to produce a flat surface, and selectively oxidizing the epitaxial silicon over the original openings in the oxide layer. One concern with this method is that the silicon island which is produced is located between a block of silicon nitride and an area of thermally oxidized silicon, subjecting the island to stresses.
U.S. Pat. No. 5,321,298 to Moslehi, describes a method for forming a semiconductor on insulator wafer with a single crystal semiconductor substrate comprising the steps of etching trenches in the substrate, forming oxide on the bottom of the trenches, growing epitaxial silicon to partially fill the trenches, forming a nitride spacer on top of the trenches, growing a second epitaxial silicon to fill the trenches, removing the nitride spacer, etching the epitaxial silicon down to the oxide originally formed at the bottom of the trenches and then filling the new trenches with oxide. Drawbacks with this method are its complexity and the integrity of the silicon crystal structure grown on many epitaxial fronts.
U.S. Pat. No. 5,691,230 describes a method of forming silicon on insulator rows and islands in a silicon substrate. Trenches are directionally etched in the silicon substrate. The tops of the rows and bottoms of the trenches are coated with silicon nitride. An isotropic etch is used to partially undercut the silicon rows. A subsequent oxidation step fully undercuts the rows of silicon, isolating the silicon rows from adjacent active areas. This method leaves a topology that may be disadvantageous to fabrication of high density circuits.
The present invention is directed toward a method of fabricating silicon on insulator regions on a substrate that produces silicon islands that are of good crystal integrity, low stress and coplanar with the rest of the wafer surface, while easily fabricated.